Table 2 Test 1 and Test 2 proof
From: Speed-up hyperspheres homotopic path tracking algorithm for PWL circuits simulations
Variable | Test 1 |
|---|---|
\(v_{1}\) | 7 ≥ 5 |
\(v_{2}\) | 7 ≥ 5 |
\(v_{3}\) | 6 ≥ 5 |
\(v_{4}\) | 7 ≥ 5 |
\(v_{5}\) | 6 ≥ 5 |
\(v_{6}\) | 7 ≥ 5 |
\(v_{7}\) | 6 ≥ 5 |
\(i_{V_{S1}}\) | 6 ≥ 5 |
Voltage drop in PWL devices | Test 2 |
|---|---|
\(v_5-v_2\) | \(-1\le 0\) |
\(v_5-v_6\) | \(-1\le 0\) |
\(v_3-v_4\) | \(-1\le 0\) |
\(v_3-v_7\) | \(0\le 0\) |