Fig. 7

2-bit relative-timed RCA composed using early output full adders such as the one shown in Fig. 5. The relative-timing assumption made is that C11↓ or C10↓ precedes SUM11↓ or SUM10↓ during RTZ. a 2-bit relative-timed RCA. The internal details and signal transitions corresponding to application of valid and spacer data is shown in b, c respectively. b Example application of valid input data in the 2-bit relative-timed RCA constructed by cascading two stages of the early output version of Seitz’s full adder. Carry generation in least significant stage: A01 = B01 = 1 with C00 = 1 assumed; SUM00 = 1 and C11 = 1 results. Carry propagation in most significant stage: A10 = B11 = 1 with C11 = 1 from the previous stage; SUM10 = 1 and C21 = 1 results. c The following RTZ phase in the 2-bit relative-timed RCA with only a partial reset of the primary inputs. Early RTZ of A01 and B11 alone could facilitate the simultaneous RTZ of SUM00, SUM10 and C21, and the late RTZ of A10 and B01 would be indicated by the completion detector. RTZ of the internal carry C11 may not be acknowledged! Hence, relative-timing assumption for the regions pointed to in green is necessary to avoid the potential problem of orphans