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Table 4 Area results for synchronizer

From: FPGA implemented testbed in 8-by-8 and 2-by-2 OFDM–MIMO channel estimation and design of baseband transceiver

Resources

Used

%

Number of slice registers

570

1

Number of slice LUTs

793

1

Number of bonded IOBs

107

16

Number of BUFG/BUFGCTRLs

1

3

Number of DSP48Es

18

28

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