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Table 2 Area results for receiver with LS estimation

From: FPGA implemented testbed in 8-by-8 and 2-by-2 OFDM–MIMO channel estimation and design of baseband transceiver

Resources	Used	%
Number of slice registers	2806	4
Number of slice LUTs	2675	3
Number of bonded IOBs	47	7
Number of BlockRAM/FIFO	3	2
Number of BUFG/BUFGCTRLs	1	3
Number of DSP48Es	18	28

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