Table 6 Number of gates required to implement an eight-bit reversible comparator
From: Design of a reversible single precision floating point subtractor
SI. No | Number of gates required | Number of garbage outputs produced |
|---|---|---|
1. Proposed work | 26 | 36 |
From: Design of a reversible single precision floating point subtractor
SI. No | Number of gates required | Number of garbage outputs produced |
|---|---|---|
1. Proposed work | 26 | 36 |