Research of thermal sensor allocation and placement based on dual clustering for microprocessors
 Xin Li^{1}Email author,
 Mengtian Rong^{1},
 Tao Liu^{1} and
 Liang Zhou^{1}
DOI: 10.1186/219318012253
© Li et al.; licensee Springer. 2013
Received: 6 December 2012
Accepted: 21 May 2013
Published: 4 June 2013
Abstract
Dynamic thermal management techniques employ a set of onchip thermal sensors to measure runtime thermal behavior of microprocessors so as to prevent the onset of high temperatures. Therefore, effective analysis of thermal behavior and determination of the best allocation and placement of thermal sensors directly impact the effectiveness of the dynamic thermal management mechanisms. In this paper, we propose systematic and effective techniques for determining the fewest number of thermal sensors and the optimal locations based on dual clustering to provide a high fidelity thermal monitoring. Initially, we utilize the dual clustering algorithm to devise method that can reduce the number of sensors to a great extent while satisfying an expected accuracy. Then we identify an optimal physical location for each sensor such that the sensor’s attraction towards steep thermal gradient is maximized. Experimental results indicate the superiority of our techniques and confirm that our proposed methods are capable of creating a sensor distribution for a given microprocessor architecture using the number of thermal sensors of 2, 8, 15, 24, 35, depending on different expected hot spot temperature error accuracy of 5%, 4%, 3%, 2%, 1%, respectively.
Keywords
Dynamic thermal management Thermal sensors Allocation Placement Dual clustering Thermal gradientIntroduction
Largescale circuit integration and exponentially increasing power densities have resulted in high temperature in current microprocessors. Elevated chip temperature slows down transistor speed and increases interconnect delays (Brooks et al. 2007). The results of these trends are timing failures and thermal runaway (Lin & Banerjee 2008). Therefore, effective assessment and analysis of the thermal behavior of microprocessors have become a major issue to be considered.
Traditionally, the problem of temperatures on chips has been solved by employing dynamic thermal management techniques (Jayaseelan & Mitra 2009) which use a set of onchip thermal sensors that continuously monitor temperatures at a few selected die locations during the runtime. The most wellknown dynamic thermal management techniques include clock gating, dynamic voltage and frequency scaling (DVFS) (Hanson et al. 2007). Several microprocessors have been equipped with thermal sensors. For instance, AMD Opteron employs 38 thermal sensors (Zhang & Srivastava 2009; Zhang & Srivastava 2011) that trigger alarms if the junction temperature exceeds a specified limit (Coskun et al. 2008).
Moreover, accuracy is another crucial criterion for dynamic thermal management techniques. Overestimation of temperature results in spurious alerts that lead to unnecessary triggering of thermal control mechanisms, e.g., DVFS (Long et al. 2008; Memik et al. 2008). On the other hand, underestimation of temperature greatly reduces the reliability since the processor will continue to operate at a higher temperature than its rated operating condition (Long et al. 2008; Memik et al. 2008). Embedding a large number of thermal sensors on the die is an unadvisable option to increase the accuracy. In fact, chips need to use the fewest number of thermal sensors to reduce manufacturing costs, die area and design complexity. In addition, allocating arbitrarily large number of sensors employed by the monitoring infrastructure, constructing the sensor networks will also pose a challenge (Long et al. 2008). An ideal goal is to monitor the highest temperatures on a microprocessor with allocating a minimum number of thermal sensors. As a result, how to provide accurate thermal monitoring in a given system while maintaining a reasonable number of sensors becomes crucial.
In this paper, we propose systematic and effective techniques for determining the fewest number of thermal sensors and the optimal locations based on dual clustering algorithm to provide a high fidelity thermal monitoring.
The organization of this paper is as follows. Related Work section overviews some of the recent relevant methods in the literature. In Proposed Thermal Sensor Allocation and Placement Techniques section we provide an overview of our methodology, where we introduce the thermal gradient calculation method in Thermal Gradient Calculation section and propose effective technique for thermal sensor allocation based on the dual clustering algorithm in Sensor Allocation Scheme section, and in Sensor Placement Strategies section we identify an optimal strategy for thermal sensor placement. We demonstrate the effectiveness of our methods through an extensive set of experimental results in Experimental Results section. Finally, Conclusion section summarizes the main conclusions of this work and indicates directions for future work.
Related work
Overview of related works
Motivation  Reference  Methodology 

Thermal sensor allocation  Long et al. (2008)  • Gridbased interpolation scheme 
Memik et al. (2008)  • Uniform allocation: interpolation scheme  
• Nonuniform allocation: improved kmeans clustering algorithm  
Nowroz et al. (2010)  • Mincut placement techniques: recursively allocating the sensors to the different die regions depending on their spectral energy  
Reda et al. (2011)  • Hard sensor allocation techniques: Heuristic iterative approach to approximate an NPhard problem  
• Soft sensor computation techniques: a weighted linear combinations of the measurements of the hard sensors  
Full thermal reconstruction  Cochran et al. (2009)  • Spectral techniques 
Li et al. (2011)  • Inverse distance weighting method based on a dynamic Voronoi diagram 
Proposed thermal sensor allocation and placement techniques
Although it is a clear trend in elevating the number of thermal sensors in high performance microprocessors (Long et al. 2008), allocating the number of sensors arbitrarily will create several overheads as mentioned earlier. Reducing the number of sensors may help relieve these overheads. However, this will cause inaccuracies. Our goal is to provide accurate thermal monitoring while maintaining a reasonable number of sensors. In this section we first introduce the thermal gradient calculation method, and then we propose systematic and effective thermal sensor allocation and placement techniques to overcome this challenge.
Thermal gradient calculation
Thermal gradient describes that in which direction and at what rate the temperature changes the most rapidly around a particular location. The magnitude of the thermal gradient determines how fast the temperature changes in the corresponding direction rather than the value of the temperature at the measuring point.
where ‘*’ here denotes the 2dimensional convolution operation.
Sensor allocation scheme
In general, placing sensors at the hot spot locations for one application will cause large temperature errors for other applications (Memik et al. 2008; Mukherjee & Memik 2006). Our objective is to address this deficiency by systematically analysis of thermal maps across a wide set of applications. We formulate the sensor allocation problem as a dual clustering of the points of interest in the spatial and nonspatial domains. We try to partition the hot spot data set into several groups, so that these groups form nonoverlapping compact regions in the spatial domain while minimizing the dissimilarity of the data points in a group on the nonspatial domain (Lin et al. 2005). Then, each group will be allocated one sensor, which will monitor the hot spot points associated with that group. In the remaining part of this section, we will first briefly introduce the basic concept of the dual clustering. Based on the dual clustering, we propose an effective sensor allocation algorithm.
Dual clustering
Where ${D}_{\mathit{ij}}^{\left(A\right)}$ is the nonspatial distance between object i and object j, ${a}_{i}^{\left(t\right)}$ and ${a}_{j}^{\left(t\right)}$ represent the values of attribute t for object i and object j, w _{ t } is the weight of attribute t, and $\sum _{t=1}^{T}{w}_{t}}=1$.
Dual clustering is the process of partitioning the object data set into several groups, while clustering dispersion in the nonspatial domain is less than the given threshold and each group is a connective cluster (Jiao et al. 2011). The result of dual clustering should be spatial continuous and attributively aggregative.
Sensor allocation algorithm
Definition 1. If the Voronoi cells of two hot spots share a Voronoi edge (have more than a single point in common), then the two hot spots are considered neighbor, i.e., the hot spots H2, H3, H4, H6 and H8 are Voronoi neighbors of hot spot H1 in Figure 2.
Definition 2. Set the number of nonspatial attributes T to 1 and the nonspatial attribute is defined as the temperature of hot spot.
Definition 3. If two hot spots are neighbor to each other and the nonspatial distance between them is less than the given threshold ${D}_{\mathrm{max}}^{\left(A\right)}$, then the Voronoi cells of the two hot spots are merged into a new cluster, i.e., in Figure 2, the Voronoi cells of hot spot H1 and H6 are merged into a cluster when ${D}_{{{}_{H}}_{1,H6}}^{\left(A\right)}<{D}_{{}_{\mathrm{max}}}^{\left(A\right)}$.
Definition 4. Set the threshold of nonspatial distance to:
Where α is a correction coefficient, ϵ _{max} is an expected hot spot temperature error accuracy, n is the number of hot spots in a cluster and a _{ i } is the value of nonspatial attribute at each hot spot in a cluster.
 1.
Select a hot spot with maximum value of thermal gradient as initial cluster center.
 2.
Apply the definition 3 to obtain a new cluster C _{ new }.
 3.
Set the hot spots in cluster C _{ new } to new cluster centers and go to Step 2.
 4.
If the cluster C _{ new } cannot be merged with other cells, it is defined as an integrated cluster, then allocate one sensor to it.
 5.
Perform the Step 1–4 in residual hot spots until each hot spot belong to a certain cluster.
Sensor placement strategies
Once we finish the hot spot clustering, the allocation number of sensors is determined. Then we need to determine the physical location of thermal sensors. In this section we identify two different strategies for thermal sensor placement.

GeometricCenter Sensor Placement. In this strategy, a sensor is placed at the geometric center of each cluster region.
As we know, ideal thermal sensor placement methods that focus on placing sensors only near potential locations which have the highest absolute temperatures will achieve the best results for hot spot temperature estimation. However, these methods might lead to poor results for full thermal reconstruction as they will have no information at the locations which temperatures change the most rapidly. Thus, we choose thermal gradient, instead of absolute temperature, as the base for sensor placement method. We propose here another strategywhich is inspired by improved kmeans clustering method (Memik et al. 2008; Mukherjee & Memik 2006)that takes into account the diversity of thermal gradients within a cluster.

ThermalGradientAttraction Sensor Placement. The basic idea behind this strategy is to move the sensors closer to the relatively higher thermal gradient hot spots. This is equivalent to the sensor being attracted to the hot spots with high thermal gradient values by a larger force (Memik et al. 2008; Mukherjee & Memik 2006). The details of this strategy are described as follows:
Experimental results
In the following two sections we first describe our experimental methodology and then we present our results.
Simulation infrastructure
To evaluate the effectiveness of our methods, we design an experimental flow that simulates thermal distribution for a 65 nm microprocessor based on Alpha EV6 architecture. We first give the definition of power consumption (Shauly 2012) and then we describe our experimental flow.
Power consumption
P _{ short } is the power consumed during gate voltage transient time, that in CMOS technology is only related to the direct path short circuit current (I _{ SC }) which flows when both the NMOS and PMOS transistors are simultaneously active, conducting current directly from supply to ground. Significant short circuit power dissipation can be avoided if the output rise/fall time of a gate is much longer than the input rise/fall time. P _{ switch } refers to the dynamic component of power, where C _{ L } is the total loading capacitance, f is the clock frequency, and ψ is the average switching activity factor. P _{ static } is due to the leakage current I _{ leakage }. Imperfect cutoff of the transistor leads to leakage (I _{ leakage }) and power dissipation (P _{ static }) even without any switching activity.
Experimental flow
The complete experimental flow shown in Figure 5 is performed using the following tools:

We use the Alpha EV6 as our base processor (Kessler 1999) with a 3 GHz clock frequency. The Alpha EV6 is an outoforder speculative execution core that is commonly used as a testbench core in thermal management research.

For workloads, we simulated the SPEC2000 benchmark (13 floating points and 12 integer benchmarks) suite (Henning 2000), using Simple Scalar (Burger & Austin 1997) 3.0e. The Simple Scalar simulates a superscalar processor with outoforder issue and execution. For each application, we simulated 10 million instructions.

For dynamic power estimation, we use Wattch (Brooks et al. 2000), a power simulator for analyzing and calculating microprocessor power dissipation at the architecturelevel. We integrate the Wattch power model into Simple Scalar simulator in order to gain the power statistics in each time interval. For each functional unit in the processor, we add an access counter to record the access information, which is fed into the Wattch power model to calculate the dynamic power traces. In our experiments, we assume clock gating to all components and that clock gating can reduce dynamic power by 75%, as proposed by Liao et al. (2005). For leakage power estimation of processor core units, we construct a leakage model (Liao et al. 2005) and use CACTI 5.0 (Wilton & Jouppi 1996) to accurately model cache leakage power.

We utilize HotSpot (Huang et al. 2006) version 5.0 for thermal simulation in the grid level (discretized into 128 × 128 grids). The floorplan of Alpha EV6 and the workload power traces from Wattch are used as inputs to the HotSpot, and finally the steadystate temperatures for a set of grid locations can be produced as output. This type of grid level thermal modelling is useful for capturing spatial temperature variation within a processor unit. The initial temperature of processor, which represents the die temperature if the processor was already executing instructions prior to execution of benchmarks to model the warm up period, was assumed to be 60°C. The ambient temperature is set to 45°C. For 3GHz clock frequency, HotSpot calling interval of 10 K cycles gives the best tradeoff between precision and overhead (Mukherjee & Memik 2006). The package assembly model in HotSpot, whose physical and thermal properties of all packaging layers are evaluated according to a practical packaged highperformance microprocessor shown in Table 2 (Lin et al. 2007), was also created shown in Figure 6.
Dimensions and thermal properties of different package layers
Layer  Area (mm ^{2})  Thickness ( mm)  Mesh length ( mm)  Specific heat ( J/ kg°C)  Density ( kg/m ^{3})  Thermal conductivity ( W/ m°C) 

Die  10 × 10  0.8  0.08  712  2330  148 
TIM1  10 × 10  0.4  0.08  230  7310  30 
IHS  30 × 30  2.4  0.2  385  8930  390 
TIM2  30 × 30  0.4  0.2  2890  900  6.4 
HeatSink  60 × 60  6.4  0.4  385  8930  360 
Results
Extensive experiments are conducted to examine the effectiveness of our proposed thermal sensor allocation and placement techniques. All experiments are implemented by MATLAB code and run on a Pentium 3.0 GHz PC with 1GB SDRAM. In our experiments we report the following three metrics:

Number of thermal sensors. Given a maximum allowable hot spot temperature error accuracy: for our proposed thermal sensor allocation and placement techniques, we determine the number of integrated cluster and each integrated cluster will be allocated one sensor; for improved kmeans clustering technique (Memik et al. 2008), we iteratively perform the improved kmeans clustering algorithm until the maximum hot spot estimation error is less than the given allowable hot spot temperature error (initially, set the value of k to 1). Finally, the value of k is the number of thermal sensors.

Hot spot estimation error. The computation of the hot spot estimation error is equal to the difference between the hot spot temperatures in the true temperature distribution signals as obtained by executing the experimental flow and the temperatures at the locations of the thermal sensors.

Full thermal reconstruction error. For each application, we reconstruct the full thermal characterization with the different strategies for thermal sensor placement, using the inverse distance weighting method based on a dynamic Voronoi diagram (Li et al. 2011). Then, we compute the average absolute temperature error between the true temperatures and the estimated temperatures calculated by the reconstruction method. We report the average absolute error computed for all 25 benchmarks.
Hot spot temperature error and corresponding number of sensors using different sensor allocation and placement approaches
Approach  Allowable error %  Average error %  Number of sensors 

IKmC  5  4.24  4 
4  3.33  13  
3  2.64  24  
2  1.32  32  
1  0.53  46  
GC  5  4.73  4 
4  3.55  12  
3  2.78  20  
2  1.61  27  
1  0.66  39  
TGA  5  4.80  2 
4  3.93  8  
3  2.97  15  
2  1.87  24  
1  0.76  35 
In conclusion, using our proposed thermal gradient attraction method, the allocation number of thermal sensors are 2, 8, 15, 24, 35, and the average absolute full thermal reconstruction errors are 9.34%, 4.12%, 2.88%, 1.65%, 0.91%, depending on different maximum allowable hot spot temperature error accuracy of 5%, 4%, 3%, 2%, 1%, respectively. These values confirm that our proposed thermal sensor allocation and placement techniques are capable of accurately characterizing the temperature of microprocessors, while requiring the fewest number of thermal sensors.
Conclusion
In this paper, we have proposed systematic and effective techniques for determining the fewest number of thermal sensors and the optimal locations based on dual clustering algorithm in a complex microprocessor system. Our goal is to provide accurate thermal monitoring while maintaining a reasonable number of sensors. We first develop method based on dual clustering algorithm that can reduce the number of sensors to a great extent while satisfying an expected accuracy. Then we identify an optimal physical location for each sensor such that the sensor’s attraction towards steep thermal gradient is maximized.
The effectiveness of our techniques has been evaluated on a sophisticated experimental setup. Experimental results indicate the superiority of our techniques and confirm that our proposed thermal sensor allocation and placement techniques are capable of accurately characterizing the temperature of microprocessors, while requiring the fewest number of thermal sensors. The significance of our techniques will allow dynamic thermal management scheme to implement the accurate temperature monitoring with small number of embedded thermal sensorsa desirable property for microprocessors.
Our future work will focus on investigating the impact of calibration errors in the thermal sensor measurements (Zhang & Srivastava 2009; Zhang & Srivastava 2011) on the results of our proposed methods.
Declarations
Acknowledgement
This work was supported by the National Basic Research Program of China under Grant 2009CB320206, by the National Natural Science Foundation of China under Grant 60821062 of China.
Authors’ Affiliations
References
 Bhattacharya P, Gavrilova ML Proceedings of the 4th International Symposium on Voronoi Diagrams in Science and Engineering. In Voronoi diagram in optimal path planning. Pontypridd, Wales, UK: IEEE Computer Society; 2007:3847. 10.1109/ISVD.2007.43Google Scholar
 Brooks D, Tiwari V, Martonosi M Proceedings of the 27th International Symposium on Computer Architecture. In Wattch: A Framework for ArchitecturalLevel Power Analysis and Optimizations. Vancouver, BC, Canada: IEEE Computer Society; 2000:8394. 10.1145/342001.339657Google Scholar
 Brooks D, Dick RP, Joseph R, Shang L: Power, thermal, and reliability modelling in nanometerscale microprocessors. IEEE Micro 2007, 27(3):4962. 10.1109/MM.2007.58View ArticleGoogle Scholar
 Burger DC, Austin TM: The simple scalar tool set, version 2.0. ACM SIGARCH Comput Arch News 1997, 25(3):1325. 10.1145/268806.268810View ArticleGoogle Scholar
 Cochran R, Reda S Proceedings of the 46th Annual Design Automation Conference. In Spectral Techniques for HighResolution Thermal Characterization with Limited Sensor Data. San Francisco, California, USA: ACM; 2009:478483. 10.1145/1629911.1630037Google Scholar
 Coskun AK, Rosing TS, Gross KC Proceedings of the International Symposium on Low Power Electronics and Design. In Proactive Temperature Management in MPSoCs. Bangalore, India: ACM; 2008:213218. 10.1145/1393921.1393966Google Scholar
 Hanson H, Keckler SW, Ghiasi S, Rajamani K, Rawson F, Rubio J Proceedings of the 2007 International Symposium on Low Power Electronics and Design. In Thermal Response to DVFS: Analysis with an Intel Pentium M. Portland, Oregon, USA: ACM; 2007:219224. 10.1145/1283780.1283827Google Scholar
 Henning J: SPEC CPU2000: Measuring CPU performance in the new millennium. IEEE Comput 2000, 33(7):2835. 10.1109/2.869367View ArticleGoogle Scholar
 Huang W, Ghosh S, Velusamy S, Sankaranarayanan K, Skadron K, Stan MR: HotSpot: A compact thermal modelling methodology for earlystage VLSI design. IEEE Trans VLSI Syst 2006, 14(5):501513. 10.1109/TVLSI.2006.876103View ArticleGoogle Scholar
 Jayaseelan R, Mitra T Proceedings of the 46th Annual Design Automation Conference. In Dynamic Thermal Management via Architectural Adaptation. San Francisco, California, USA: ACM; 2009:484489. 10.1.1.151.4312Google Scholar
 Jiao LM, Liu YL, Zou B: Selforganizing dual clustering considering spatial analysis and hybrid distance measures. Sci China Earth Sci 2011, 54(8):12681278. 0.1007s1143001142221View ArticleGoogle Scholar
 Kessler RE: The Alpha 21264 microprocessor. IEEE Micro 1999, 19(2):2436. 10.1109/40.755465View ArticleGoogle Scholar
 Li X, Rong M, Liu T, Zhou L: Inverse distance weighting method based on a Dynamic Voronoi Diagram for thermal reconstruction with limited sensor data on multiprocessors. IEICE Trans Electron 2011, E94C(8):12951301. 10.1587/transele.E94.C.1295View ArticleGoogle Scholar
 Liao W, He L, Lepak KM: Temperature and supply voltage aware performance and power modelling at microarchitecture level. IEEE Trans ComputAided Design of Integr Circuits and Syst 2005, 24(7):10421053. 10.1109/TCAD.2005.850860View ArticleGoogle Scholar
 Lin SC, Banerjee K: Cool chips: opportunities and implications for power and thermal management. IEEE Trans Electron Devices 2008, 55(1):245255. 10.1109/TED.2007.911763View ArticleGoogle Scholar
 Lin CR, Liu KH, Chen MS: Dual clustering: integrating data clustering over optimization and constraint domains. IEEE Trans Knowl Data Eng 2005, 17(5):628637. 10.1109/TKDE.2005.75View ArticleGoogle Scholar
 Lin SC, Chrysler G, Mahajan R, De VK, Banerjee K: A selfconsistent substrate thermal profile estimation technique for nanoscale ICsPart II: Implementation and implications for power estimation and thermal management. IEEE Trans Electron Devices 2007, 54(12):33513360. 10.1109/TED.2007.909038View ArticleGoogle Scholar
 Long J, Memik SO, Memik G, Mukherjee R: Thermal monitoring mechanisms for chip multiprocessors. ACM Trans Arch Code Optimization 2008, 2(5):9:19:33. 10.1145/1400112.1400114Google Scholar
 Memik SO, Mukherjee R, Ni M, Long J: Optimizing thermal sensor allocation for microprocessors. IEEE Trans ComputAided Design Integr Circuits 2008, 27(3):516527. 10.1109/TCAD.2008.915538View ArticleGoogle Scholar
 Mukherjee R, Memik SO Proceedings of the 43rd annual Design Automation Conference. In Systematic Temperature Sensor Allocation and Placement for Microprocessors. San Francisco, California, USA: ACM; 2006:542547. 10.1145/1146909.1147051Google Scholar
 Nowroz AN, Cochran R, Reda S Proceedings of the 47th Design Automation Conference. In Thermal Monitoring of Real Processors: Techniques for Sensor Allocation and Full Characterization. Anaheim, California, USA: ACM; 2010:5661. 10.1145/1837274.1837291Google Scholar
 Reda S, Cochran R, Nowroz AN: Improved thermal tracking for processors using hard and soft sensor allocation techniques. IEEE Trans Comput 2011, 60(6):841851. 10.1109/TC.2011.45View ArticleGoogle Scholar
 Shauly EN: CMOS leakage and power reduction in transistors and circuits: process and layout considerations. J Low Power Electron Appl 2012, 2(1):129. 10.3390/jlpea2010001View ArticleGoogle Scholar
 Wang W Proceedings of the 2009 International Joint Conference on Artificial Intelligence. In Reach on Sobel Operator for Vehicle Recognition. Hainan Island: IEEE Computer Society; 2009:448451. 10.1109/JCAI.2009.54Google Scholar
 Wilton S, Jouppi NP: CACTI: an enhanced Cache Access and Cycle Time Model. IEEE J Solid State Circuits 1996, 31(5):677688. 10.1109/4.509850View ArticleGoogle Scholar
 Zhang Y, Srivastava A Proceedings of the 46th Annual Design Automation Conference. In Accurate Temperature Estimation Using Noisy Thermal Sensors. San Francisco, California, USA: ACM; 2009:472477. 10.1145/1629911.1630036Google Scholar
 Zhang Y, Srivastava A: Accurate temperature estimation using noisy thermal sensors for Gaussian and nonGaussian cases. IEEE Trans Very large Scale Integr Syst 2011, 19(9):16171626. 10.1109/TVLSI.2010.2051567View ArticleGoogle Scholar
Copyright
This article is published under license to BioMed Central Ltd. This is an Open Access article distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/2.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.